clear

print @byte(12345678)
print @word(12345678)
print @dword(12345678)
print @hbyte(12345678)
print @hword(12345678)
print @long(12345678)	;`֐
print @byte(zx)		;p[^G[

print @dword(12345678T)		;10i
print @byte(100+10T)
print @byte(1000_1001_)		;2i

print @splitw(12345678, b)	;rbNGfBA
print @splitdw1(12345678, b)	;rbNGfBA
print @splitdw2(12345678, b)	;rbNGfBA

print @splitw(12345678, L)	;gGfBA
print @splitdw1(12345678, L)	;gGfBA
print @splitdw2(12345678, L)	;gGfBA

print @splitdw(12345678, z)	;`֐
print @splitdw1(12345678, z)	;p[^G[


print @inc(5, 80)
print @dec(5, 80)
print @inc(5, 80, 2)
print @dec(5, 80, 2)

print @incw(5, -1)
print @decw(5, -1)
print @incw(5, -1, 2)
print @decw(5, -1, 2)


print @addr(1000+100)
print @addr(1000+100,1)

;          data   io   endian addressing
define_mem 10000 10000 LE     BA

add_mem_area	ram	8000 2000 2 RW
add_io_area	io	0000 0100
print @sect(ram)
print @sect(ram, 1023)
print @addr(@sect(ram, 1023), 1)

set -s 8000 -b @inc(10, 0)
get -s 8000 -b 10
get -s 8000.1 -b 10
print @peek(8002)
print @peekw(8002)
print @peekdw(8002)
print @peekdw(8002.1)

set -p 0 -b @inc(10, 80)
get -p 0 -b 10
print @in(0002)
print @inw(0002)
print @indw(0002)


get -s 8000 -b 10
get -s 8000 -w 8
print @checksum(8000, 10)
print $_ADDR , $_RESULT
print @checksum(8000, 10, 100)
print @checksumw(8000, 8)
print $_ADDR , $_RESULT
print @checksumw(8000, 8, 100)

set -s 8000 -b 01 01 ef
set -s 8010 -b 80 80 f7

;#if 0
print @crcL(7, 8000, 3, 45)	;0x01f6d870->0x38
print $_RESULT
print @crcR(7, 8010, 3, 51)	;0x0000000e
print $_RESULT

print @crcL(7,8000, 2000, 45)	;0x1f6d870->0x38
;#endif

set -s 8020 "Hello, world!"
print @crcL(32t, 8020, 13t, 04C11DB7, -1,-1)	;0x8E9A7706
print $_RESULT
print @crcR(32t, 8020, 13t, EDB88320, -1,-1)	;0xEBE6C6E6
print $_RESULT

define_literal crc32Rۑ	@crc32R(8020, 13t, EDB88320, -1)
print $_ADDR , $_RESULT

;-------------------------------------------------
set -s 8040 -b 01 02 03
set -s 8060 -b 02 01 03
print @crcL(7,8040, 3, 45)	;
print @crcR(7,8060, 3, 51)	;
set -s 8020 "Hello, world!"
print @crcL(7, 8020, 13t, 45)	
print @crcR(7, 8020, 13t, 51)

;-------------------------------------------------
;          data   io   endian addressing
define_mem 10000 10000 BE     BA -f

add_mem_area	ram	8000 2000 2 RW
set -s 8040 -b 01 02 03
set -s 8060 -b 02 01 03
print @crcL(7, 8040, 3, 45)	;0x01f6d870->0x38
print @crcR(7, 8060, 3, 51)	;0x0000000e

;-------------------------------------------------
;          data   io   endian addressing
define_mem 10000 10000 LE     WA -f

add_mem_area	ram	8000 2000 2 RW
set -s 8000 -b 01 02 03
set -s 8020 -b 02 01 03
print @crcL(7, 8000, 3, 45)	;0x01f6d870->0x38
print @crcR(7, 8020, 3, 51)	;0x0000000e

;-------------------------------------------------
;          data   io   endian addressing
define_mem 10000 10000 BE     WA -f

add_mem_area	ram	8000 2000 2 RW
set -s 8000 -b 01 02 03
set -s 8020 -b 02 01 03
print @crcL(7, 8000, 3, 45)	;0x01f6d870->0x38
print @crcR(7, 8020, 3, 51)	;0x0000000e

;-------------------------------------------------

print  @reps(2 , -l 33 -w 44 -b 66 "sample" )
print  @reps(2 , -b @inc(3, 10) "sample" )

;-------------------------------------------------
print @sextb(7f)
print @sextb(80)

print @sextw(7fff)
print @sextw(8000)

